For RunEL's Sparq-2020 Team:
VLSI Design Engineer
BSc in Electrical Engineering - Mandatory
Two to five years’ experience in architecture, logic design and synthesis- Mandatory
Experience with FPGA SOC - Advantage
Experience with PHY design - Advantage
Experience with verification - Advantage
Send us your CV plus recommendations to Jobs@runel.net
HW Design Engineer
BSc in Electrical Engineering with 3 years’ experience, or Practical Engineer with 10 years’ experience.
Experience in Board Design using ORCAD - Mandatory
Experience in SoC/FPGA testing /communication systems - Mandatory
Experience with lab test equipment: Signal Generator, Scope, Logic Analyzer/Chipscope – Mandatory.
Knowledge in one of the following RTL languages: VHDL, Verilog – Advantage
Knowledge in LINUX OS- Advantage
Send us your CV plus recommendations to Jobs@runel.net
SW Engineer
BSc in Computer Engineering - Mandatory
Two to Five years’ experience in embedded system using C++- Mandatory
Experience in embedded Linux OS - Mandatory
Knowledge with Networking Protocols - Mandatory
Experience with FPGA SOC - Advantage
Send us your CV plus recommendations to Jobs@runel.net
Senior SW Engineer
BSc/MSc in Computer Engineering - Mandatory
SW engineer with knowledge in Real Time SW development of LTE MAC layer - Mandatory
More than five years’ experience in embedded system using C++ - Mandatory
Experience in embedded Linux OS - Mandatory
Knowledge with Networking Protocols - Mandatory
Experience with FPGA SOC - Advantage
Send us your CV plus recommendations to Jobs@runel.net